INTERNATIONAL RESEARCH JOURNAL OF MODERNIZATION IN ENGINEERING TECHNOLOGY AND SCIENCE

Growing demand for memory control reliability in embedded systems requires solid DMA controllers with embedded error detection. A compact ECC-enabled DMA controller designed in Verilog HDL with 4-bit ECC for 8-bit data, programmable single/burst transfer modes, and real-time error detection is proposed in this paper. The design has been verified and FPGA-tested and achieves low-latency transfers (2 cycles single, 5 cycles burst) and 100% error detection for errant addresses. Hardware-efficient, it is an ideal fit for IoT, industrial automation, and real-time systems and makes way for VLSI breakthroughs in memory integrity and semiconductor self- sufficiency.

DOI has been requested and is pending allotment.